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COREAPB3
Product Summary
Intended Use
* * * * Intended for Use in Processor-Based Systems to Implement the AMBA APB Bus Fabric Allows Connection of either AMBA, APB2, or APB3 Peripherals to an APB3 Master Configured for Easy and Automatic System Design with CoreConsole To Be Used Only with APB Masters that Do Not Have Built-In APB Address Decoding
Verification and Compliance
* Compliant with AMBA
Contents
Contents ..................................................................... General Description ................................................... Pinout ......................................................................... Connecting COREAPB3 in CoreConsole ..................... Utilization ................................................................... Ordering Information ................................................ List of Changes ........................................................... Datasheet Categories ................................................. 1 1 2 3 3 3 4 4
Key Features
* * Up to 16 Slave Devices (APB2 or APB3) Supported Automatic Connection to AHB Bridge (CoreAHBtoAPB3) and APB Slaves, as well as APB3 Slaves Provides Configurable Address Decoding for APB Slots
*
General Description
Along with CoreAHBtoAPB3, the COREAPB3 bus component provides an AMBA APB fabric that supports up to 16 APB slaves. CoreAHBtoAPB3 provides APB address decoding in the form of select signals. COREAPB3 is concerned with multiplexing the read data busses, PREADY signals, and PSLVERR signals to send to CoreAHBtoAPB3. Figure 1 gives an illustration of COREAPB3. There is one APB master, which sends out a PSEL signal to COREAPB3. This is used by COREAPB3, along with appropriate bits from the PADDR bus, to decode the appropriate PSELS signal. This address decoding is dependent on the RangeSize hardware parameter/generic. All 16 APB slots are always of equal size. However, this size may be configured as any value from 256 locations to 1 M locations by setting RangeSize appropriately (via CoreConsole).
Benefits
* * * Allows Easy Connection of APB Devices to a CoreMP7 or CortexTM-M1 Subsystem Auto Stitch in CoreConsole for Rapid Development Compatible with AMBA, CoreMP7, and Cortex-M1
Supported Device Families
* * * * * * Fusion IGLOOTM IGLOOe ProASIC(R)3L ProASIC3 ProASIC3E
Synthesis and Simulation Support
* Supported in the Actel Libero(R) Integrated Design Environment (IDE)
PSTB PA[31:0] PWDATA[31:0] PWRITE PSEL PRDATA[31:0]
To APB Slaves
From Bridge
To Bridge
PRDATA[31:0] PRDATA[31:0] PRDATA[31:0]
From Slave 1 From Slave 2 From Slave N
Figure 1 * COREAPB3
January 2008 (c) 2008 Actel Corporation
v 2 .1
1
COREAPB3
Pinout
The pinout of COREAPB3 is shown in Figure 2.
COREAPB3
PADDR PWRITE PENABLE PSEL PWDATA PRDATAS0 PRDATAS1 PRDATAS2 PRDATAS3 PRDATAS4 PRDATAS5 PRDATAS6 PRDATAS7 PRDATAS8 PRDATAS9 PRDATAS10 PRDATAS11 PRDATAS12 PRDATAS13 PRDATAS14 PRDATAS15 PREADYS0 PREADYS1 PREADYS2 PREADYS3 PREADYS4 PREADYS5 PREADYS6 PREADYS7 PREADYS8 PREADYS9 PREADYS10 PREADYS11 PREADYS12 PREADYS13 PREADYS14 PREADYS15 PSLVERRS0 PSLVERRS1 PSLVERRS2 PSLVERRS3 PSLVERRS4 PSLVERRS5 PSLVERRS6 PSLVERRS7 PSLVERRS8 PSLVERRS9 PSLVERRS10 PSLVERRS11 PSLVERRS12 PSLVERRS13 PSLVERRS14 PSLVERRS15 PRDATA PREADY PSLVERR PADDRS PWRITES PENABLES PWDATAS
PSEL0 PSEL1 PSEL2 PSEL3 PSEL4 PSEL5 PSEL6 PSEL7 PSEL8 PSEL9 PSEL10 PSEL11 PSEL12 PSEL13 PSEL14 PSEL15
Figure 2 * COREAPB3 Pinout
2
v2.1
COREAPB3
Connecting COREAPB3 in CoreConsole
Table 1 lists the ports present on the APB bus and describes how to connect these in CoreConsole.
Table 1 * APB Bus Connections Connection CoreConsole Label Required Connections APB3 mirrored master interface APB3mmaster This interface connects CoreAHBtoAPB3. to the APB3master interface of Description
Optional Connections APBmslave0 APBmslave1 APBmslave2 APBmslave3 APBmslave4 APBmslave5 APBmslave6 APBmslave7 APBmslave8 APBmslave9 APBmslave10 APBmslave11 APBmslave12 APBmslave13 APBmslave14 APBmslave15 APB mirrored slave 0 interface APB mirrored slave 1 interface APB mirrored slave 2 interface APB mirrored slave 3 interface APB mirrored slave 4 interface APB mirrored slave 5 interface APB mirrored slave 6 interface APB mirrored slave 7 interface APB mirrored slave 8 interface APB mirrored slave 9 interface APB mirrored slave 10 interface APB mirrored slave 11 interface APB mirrored slave 12 interface APB mirrored slave 13 interface APB mirrored slave 14 interface APB mirrored slave 15 interface
Utilization
The utilization for COREAPB3 in a Fusion, IGLOO, ProASIC3L, ProASIC3, or ProASIC3E device is 580 tiles when attached to 16 APB slave devices. The utilization in a ProASICPLUS device is 640 tiles for the same configuration. Both these numbers assume the use of typical synthesis conditions.
Ordering Information
The obfuscated RTL version of SysBASIC (SysBASIC-OC) is available for free with CoreConsole. The source RTL version of SysBASIC (SysBASIC-RM) can be ordered through your local Actel sales representative. COREAPB3 cannot be ordered separately from the SysBASIC core bundle.
v2.1
3
COREAPB3
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous Version Changes in Current Version (v 2 .1 ) v2.0 The "Supported Device Families" section was updated to include ProASIC3L. The "Utilization" section was updated to include ProASIC3L. Advanced v0.1 The "Product Summary" section and "Utilization" section were updated to add Cortex-M1 and IGLOO/e information. The "Ordering Information" section was updated to state that COREAPB3 cannot be ordered separately from the SysBASIC core bundle. Page 1 3 1, 3 3
Datasheet Categories
In order to provide the latest information to designers, some datasheets are published before data has been fully characterized. Datasheets are designated as "Product Brief," "Advanced," and "Production." The definitions of these categories are as follows:
Product Brief
The product brief is a summarized version of an advanced or production datasheet containing general product information. This brief summarizes specific device and family information for unreleased products.
Advanced
This datasheet version contains initial estimated information based on simulation, other products, devices, or speed grades. This information can be used as estimates, but not for production.
Unmarked (production)
This datasheet version contains information that is considered to be final.
4
v2.1
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www.actel.com
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